1/4 rev. b structure silicon monolithic integrated circuit name of product dc-ac inverter control ic type ? function ?2ch control with half-bridge ?lamp current and voltage sense feed back control ?sequencing easily achieved with soft start control ?short circuit protection with timer latch ?under voltage lock out ?short circuit protection with over voltage ?mode-selectable the operating or stand-by mode by stand-by pi n ?control pwm and burst mode by duty pin ?burst mode with 2ch reverse phase absolute maximum ratingsta = 25 parameter symbol limits unit supply voltage v cc 12 v operating temperature range topr -35+85 storage temperature range tstg -55+125 power dissipation pd 850 * mw maximum junction temperature tjmax +125 * pd derated at 8.5mw/ for temperature above ta = 25 (when moun ted on a pcb 70.0mm70.0mm1.6mm) recommended operating condition status of this document the japanese version of this document is the official specification. please use the translation version of this document as a reference to expedite understanding of the official version. if these is any uncertainty in translation version of this document, official version takes priority. parameter symbol range unit supply voltage v cc 5.011.0 v ct oscillation frequency f ct 35200 khz bct oscillation frequency f bct 0.100.50 khz
2/4 rev. b electric characteristicsta=25vcc=7v parameter symbol limits unit conditions min. typ. max. whole device operating current icc1 9.0 17.0 ma ct=0.5v stand-by current icc2 4 8 ua over voltage detect fb over voltage detect voltage vovf 2.70 3.00 3.30 v output block pch output voltage h voutph vcc-0.3 vcc-0.1 v nch output voltage h voutnh vcc-0.3 vcc-0.1 v pch output voltage l voutpl 0.1 0.3 v nch output voltage l voutnl 0.1 0.3 v pch output sink resistance rsinkp 8 16 pch output source resistance rsourcep 10 20 nch output sink resistance rsinkn 8 16 nch output source resistance rsourcen 10 20 stand-by control stand-by voltage h vsth 2.0 v system stand-by voltage l vstl 0.8 v system hysteresis width Svst 0.05 0.15 0.25 v timer latch timer latch voltage vcp 1.5 1.9 2.3 v timer latch current icp 1.0 2.0 3.0 ua osc block active edge current iact 1.2/rt 1.5/rt 1.8/rt a negative edge current ineg 1.2/rdis 1.5/rdis 1.8/rdis a osc max voltage vosch 1.8 2.0 2.2 v fact=10khz osc min voltage voscl 0.3 0.5 0.7 v fneg=100khz soft start current iss 1.0 2.0 3.0 ua is comp detect voltage visc 0.6 v ss comp detect voltage vss 2.2 v srt on resistance rsrt 200 400 uvlo block operating voltage vuvloh 4.25 4.50 4.75 v shut down voltage vuvlol 4.0 4.25 4.50 v feed back block is threshold voltage vis 1.220 1.250 1.280 v vs threshold voltage vvs 1.220 1.250 1.280 v is source current 1 iis1 1.5 ua duty=2.0v is source current 2 iis2 13.0 20.0 27.0 ua duty=0vis=0.5v vs source current ivs 0.9 ua burst mode bosc max voltage vburh 1.8 2.0 2.2 v f bct =0.3khz bosc min voltage vburl 0.3 0.5 0.7 v f bct =0.3khz bosc constant current i burosc 1.2/brt 1.5/brt 1.8/brt a reg block reg output voltage vreg 3.038 3.100 3.162 v reg source current ireg 5.0 ma comp block over voltage detect vcomph 2.20 2.5 2.80 v under voltage detect vcompl 0.590 0.640 0.690 v protect clock normal output voltage vph 2.9 3.1 3.3 v protect output voltage vpl 0.5 v this product is not designed for normal operation with in a ra dio active environment.
3/4 rev. b package dimensions block diagram pin description pin no. pin name function 1 duty control pwm mode and burst mode 2 brt external resistor from brt to gnd for adjusting the burst triangle oscillator 3 bct external capacitor from bct to gnd for adjusting the burst triangle oscillator 4 rdis external resistor from rdis to gnd for adjusting the triangle oscillator 5 rt external resistor from srt to rt for adjusting the triangle oscillator 6 srt external resistor from srt to rt for adjusting the triangle oscillator 7 ct external capacitor from ct to gnd for adjusting the triangle oscillator 8 gnd ground 9 fb1 error amplifier output 10 is1 error amplifier input 11 vs1 error amplifier input 12 fb2 error amplifier output 13 is2 error amplifier input 14 vs2 error amplifier input 15 fail protect clock output 16 stb stand-by switch 17 comp1 under, over voltage detect for 1ch 18 comp2 under, over voltage detect for 1ch 19 reg internal regulator output 20 ss external capacitor from ss to gnd for soft start control 21 scp1 external capacitor from scp1 to gnd for timer latch for 1ch 22 scp2 external capacitor from scp2 to gnd for timer latch for 2ch 23 p2 fet driver for 2ch 24 n2 fet driver for 2ch 25 pgnd ground for fet drivers 26 n1 fet driver for 1ch 27 p1 fet driver for 1ch 28 vcc supply voltage input ssop-b28 (unit:mm) bd9766fv lot no. device mark stb block systemon/off osc bosc ct vcc rt brt bct duty p1 n1 stb is1 duty block reg block uvlo block vcc reg f/b block pwm block logic block output block ss ct vs1 ss fb1 p2 n2 is2 f/b block pwm block ss ct vs2 fb2 fail protect block gnd pgnd comp1 comp2 scp2 srt vcc vcc rdis scp1 logic block output block (include burr 10.35 )
4/4 rev. b note for use when designing the external circuit, including adequate marg ins for variation between external devices and the ic.use adequate margins for steady state and transient characteristics . recommended operating range the circuit functionality is guaranteed within of ambient temperature operation range as long as it is within recommended operating range. the standard electrical characteristic values cannot be guaranteed at other voltages in the operating ranges, however, the variation will be small. mounting failures mounting failures, such as misdirection or miscounts, may harm the device. electromagnetic fields a strong electromagnetic field may cause the ic to malfunction. . the gnd pin should be the location within 0.3v compared with the pgnd pin bd9766fv has the short circuit protection with thermal shut down system. when stb or vcc pin re-supplied, they enables to cancel the latch. if it rise the temperature of the chip mor e than 170(typ), it make the external fet off absolute maximum ratings are those values that, if exceeded, may cause the life of a device to become significantly shorten ed. moreover, the exact failure mode caused by short or open is not defined. physical countermeasures, such as a fuse, need to be considered when using a device beyond its maximum ratings . about the external fet, the parasitic capacitor may cause th e gate voltage to change, when the drain voltage is switching. make sure to leave adequate margin for this ic variation. on operating slow start control (ss is less than 2.2v), it does not operate timer latch. by stb voltage, bd9886fv is changed to 2 states. therefore, do not input stb pin voltage between one state and the other state (0.82.0v). the pin connected a connector need to connect to the resistor for electrical surge destruction. this ic is a monolithic ic which (as shown is fig-1)has p + substrate and between the various pins. a p-n junction is formed from this p layer of each pin. for example, the relation between each potential is as follows, (when gnd > pinb and gnd > pina, the p-n junction operates as a parasitic diode.) (when pinb > gnd > pina, the p-n junction operates as a parasitic transistor.) parasitic diodes can occur inevitably in the structure of the ic. the operation of parasitic diodes can result in mutual interference among circuits as well as operation faults and physical damage. accordingly you must not use methods by which parasitic diodes operate, such as applying a voltage that is lower than the gnd(p substrate)voltage to an input pin. -1 simplified structure of a bipolar ic p substrate parasitic diode gnd n p p resistance transistor (npn) other adjacent components parasitic diode (pinb) (pina) p gnd p substrate gnd n n b c e n n (pina) (pinb) parasitic diode gnd gnd parasitic diode c b e
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